Smart write-field placement using Tescan technological layers in a standard GDSII workflow
Standard SEMs can write fine features, but they were designed for characterization, not long-range, lithography-grade placement. Once you extend a standard SEM with EBL, the limiting factor often shifts from resolution to navigation: write-field boundaries and stage drift start to dominate failures in large or continuous patterns. The goal is not to “fix” the stage, it is to design your exposure plan, so any stitching happens where it does not matter.
Why stitching shows up on a standard SEM stage
Dedicated EBL tools typically use interferometric stages to deliver strong absolute placement and repeatability over long travel ranges. A standard SEM stage is optimized for bringing regions of interest into the field of view, not for deterministic overlay across large areas. That fundamental difference is why stitching at write-field boundaries becomes the dominant failure mode for arrays, long interconnects, or any structure that spans multiple fields.
Why SEM-based EBL is still high-value nanoprototyping
This is also why SEM-based EBL is such a strong starting point for nanoprototyping: the SEM is already in the lab, it supports rapid iteration, and it keeps imaging, measurement, and patterning in one instrument. With the Tescan Essence EBL Kit add-on, users can move from “design-only” to a practical loop of pattern → inspect → adjust, without the upfront commitment to a dedicated EBL system.
Solution: Technological layers inside GDSII
In the Tescan solution, write-field intent is encoded using technological layers inside a standard GDSII file. The approach remains GDSII-compatible: third-party editors can open the file as usual, and tools without the EBL Kit simply treat the extra information as ordinary layer content (no special behaviour is applied).
Example: Large area plasmonic arrays
A good use case is large-area patterning of repeating, self-standing plasmonic structures. Here, the priority is shape fidelity of each element, while the design can tolerate small placement variations across the array.
To illustrate the concept, Figure 1 shows a plasmonic classic: the diabolo antenna. When the target patterned area exceeds the maximum write field that still delivers the required accuracy, the system must split the layout across multiple fields (Figure 2). If this splitting is left purely automatic, stitching boundaries can land inside the antennas-creating discontinuities exactly where you least want them.
How to define write fields in KLayout
Technological layers enable a controlled strategy: engineer where stitching can occur by explicitly defining write-field placement. Using the EBL Kit add-on for the open-source GDSII editor KLayout, users can draw write-field bounding boxes around selected objects (or groups of objects). This creates a write-field map that exposes only the intended geometry per field (Figure 3), keeping boundaries out of critical regions.
How to define write fields in KLayout
Quick workflow: keep stitching boundaries out of critical areas
- Identify critical geometry where a stitching would be harmful (tips, gaps, narrow necks, continuous lines).
- Choose a write-field size that still delivers the required shape fidelity.
- Check the default field splitting and locate where stitching would land if you do nothing.
- In KLayout (with the EBL kit add-on), add technological-layer write-field boxes to define field boundaries intentionally.
- Place boundaries only in tolerant regions (typically between repeating elements), never through critical structures.
- Verify coverage: every target object is fully inside exactly one intended write field.
- Expose and inspect, then iterate field placement if any seams still appear near critical areas.
Results
You can achieve stitching-free critical geometry (Figure 4), even on a standard SEM, by using technological layers to place write-field boundaries only in non-critical regions.
Figure 1: Example of diabolo antennas misaligned due to stitching error of the stage.
Figure 2: Example of how the system automatically slices the design into write fields and an example of stitching errors that can occur on the write field boundaries.
Figure 3: User-defined write fields using the Tescan technological layers to create bounding boxes just around the features, pushing the stitching error outside of the critical areas.
Figure 4: Close up the diabolo antennas exposed using user-defined write field placement via Tescan technological layers, to push the stitching error to non-critical parts of the design.
Learn more
- Essence™ EBL Kit and nanoprototyping overview
- Application example (plasmonics)
- Webinar (Nanoprototyping toolbox)
Next Steps
If you are running into stitching limits on a standard SEM, we can help you map write-field boundaries to your design tolerances and exposure strategy. Contact us to discuss your application.
Question: Where are stitching boundaries most damaging in your structures, inside features, at interconnects, or at overlay interfaces?
Written by Miloš Hrabovský
Product Marketing Manager, Tescan
New product releases, application insights, and event updates.
Delivered as a quarterly newsletter with product news, insights, and events.
